View LT1765ES8_8599555.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 1 1765fd typical application description monolithic 3a, 1.25mhz step-down switching regulator the lt ? 1765 is a 1.25mhz monolithic buck switching regulator. a high ef? ciency 3a, 0.09 switch is included on the die together with all the control circuitry required to construct a high frequency, current mode switching regulator. current mode control provides fast transient response and excellent loop stability. new design techniques achieve high ef? ciency at high switching frequencies over a wide operating voltage range. a low dropout internal regulator maintains con- sistent performance over a wide range of inputs from 24v systems to li-ion batteries. an operating supply current of 1ma improves ef? ciency, especially at lower output currents. shutdown reduces quiescent current to 15a. maximum switch current remains constant at all duty cycles. synchronization allows an external logic level signal to increase the internal oscillator into the range of 1.6mhz to 2mhz. full cycle-by-cycle current control and thermal shutdown are provided. high frequency operation allows the reduc- tion of input and output ? ltering components and permits the use of chip inductors. l , lt, ltc and ltm are registered trademarks of linear technology corporation. *patent pending 5v to 3.3v step-down converter features applications n dsl modems n portable computers n regulated wall adapters n battery-powered systems n distributed power n 3a switch in a thermally enhanced 16-lead tssop or 8-lead so package n constant 1.25mhz switching frequency n wide operating voltage range: 3v to 25v n high ef? ciency 0.09 switch n 1.2v feedback reference voltage n uses low pro? le surface mount components n low shutdown current: 15a n synchronizable to 2mhz n current mode loop control n constant maximum switch current rating at all duty cycles* n available in 8-lead so and 16-lead thermally enhanced tssop packages boost lt1765-3.3 v in output3.3v 2.5a input 5v 1765 ta01 0.18f 2.2nf ups120 4.7fceramic 2.2f ceramic cmdsh-3 1.5h v sw fb shdn on off gnd v c sync ef? ciency vs load current switch current (a) 0 efficiency (%) 80 85 2.0 1765 ? tao1a 7570 0.5 1.0 1.5 90 v in = 10v v out = 5v downloaded from: http:///
lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 2 1765fd absolute maximum ratings input voltage ........................................................... 25v boost pin above sw ............................................. 20v max boost pin voltage ............................................35v shdn pin ................................................................. 25v fb pin current ......................................................... 1ma (note 1) fe package 16-lead plastic tssop 12 3 4 5 6 7 8 top view 1615 14 13 12 11 10 9 gnd boost v in v in swsw nc gnd gndnc sync v c fbshdn nc gnd 17 ja = 45c/w, jc(pad) = 10c/w exposed pad (pin 17) soldered to large copper plane top view syncv c fbshdn boost v in sw gnd s8 package 8-lead plastic so 12 3 4 87 6 5 t jmax = 125c, ja = 90c/w, jc(pin 4) = 30c/w ground pin connected to large copper area pin configuration order information lead free finish tape and reel part marking package description temperature range lt1765efe#pbf lt1765efe#trpbf 1765efe 16-lead plastic tssop C40c to 125c lt1765efe-1.8#pbf lt1765efe-1.8#trpbf 1765efe-1.8 16-lead plastic tssop C40c to 125c lt1765efe-2.5#pbf lt1765efe-2.5#trpbf 1765efe-2.5 16-lead plastic tssop C40c to 125c lt1765efe-3.3#pbf lt1765efe-3.3#trpbf 1765efe-3.3 16-lead plastic tssop C40c to 125c lt1765efe-5#pbf lt1765efe-5#trpbf 1765efe-5 16-lead plastic tssop C40c to 125c LT1765ES8#pbf LT1765ES8#trpbf 1765 8-lead plastic so C40c to 125c lead based finish tape and reel part marking package description temperature range lt1765efe lt1765efe#tr 1765efe 16-lead plastic tssop C40c to 125c lt1765efe-1.8 lt1765efe-1.8#tr 1765efe-1.8 16-lead plastic tssop C40c to 125c lt1765efe-2.5 lt1765efe-2.5#tr 1765efe-2.5 16-lead plastic tssop C40c to 125c lt1765efe-3.3 lt1765efe-3.3#tr 1765efe-3.3 16-lead plastic tssop C40c to 125c lt1765efe-5 lt1765efe-5#tr 1765efe-5 16-lead plastic tssop C40c to 125c LT1765ES8 LT1765ES8#tr 1765 8-lead plastic so C40c to 125c consult ltc marketing for parts speci? ed with wider operating temperature ranges. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ sync pin current ................................................... 1ma operating junction temperature range (note 2) ................................................. C40c to 125c storage temperature range ................. C65c to 150c lead temperature (soldering, 10 sec) ................ 300c downloaded from: http:///
lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 3 1765fd electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the lt1765e is guaranteed to meet performance speci? cations from 0c to 125c. speci? cations over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. parameter conditions min typ max units maximum switch current limit 346 a oscillator frequency 3.3v < v in < 25v l 1.1 1.25 1.6 mhz switch on voltage drop i = 3a l 270 430 mv v in undervoltage lockout (note 3) l 2.47 2.6 2.73 v v in supply current l 1 1.3 ma shutdown supply current v shdn = 0v, v in = 25v, v sw = 0v l 15 35 55 aa feedback voltage 3v < v in < 25v, 0.4v < v c < 0.9v (note 3) lt1765 (adj) l 1.1821.176 1.2 1.218 1.224 vv lt1765-1.8 l 1.764 1.8 1.836 v lt1765-2.5 l 2.45 2.5 2.55 v lt1765-3.3 l 3.234 3.3 3.366 v lt1765-5 l 4.9 5 5.1 v fb input current lt1765 (adj) l C0.25 C 0.5 a fb input resistance lt1765-1.8 lt1765-2.5 lt1765-3.3 lt1765-5 ll l l 10.514.7 1929 1521 27.5 42 2130 39 60 kk k k fb error amp voltage gain 0.4v < v c < 0.9v 150 350 fb error amp transconductance i vc = 10a l 500 850 1300 mho v c pin source current v fb = v nom C 17% l 80 120 160 a v c pin sink current v fb = v nom + 17% l 70 110 180 a v c pin to switch current transconductance 5a / v v c pin minimum switching threshold duty cycle = 0% 0.4 v v c pin 3a isw threshold 0.9 v maximum switch duty cycle v c = 1.2v, i sw = 800ma, v in = 6v l 8580 90 % % minimum boost voltage above switch i sw = 3a l 1.8 2.7 v boost current i sw = 1a (note 4) i sw = 3a (note 4) ll 2070 30 140 mama shdn threshold voltage l 1.27 1.33 1.40 v shdn threshold current hysteresis l 471 0 a shdn input current (shutting down) shdn = 60mv above threshold l C7 C10 C13 a sync threshold voltage 1.5 2.2 v sync input frequency 1.6 2 mhz sync pin resistance i sync = 1ma 20 k the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v in = 15v, v c = 0.8v, boost = v in + 5v, shdn , sync and switch open unless otherwise noted. note 3: minimum input voltage is de? ned as the voltage where the internal regulator enters lockout. actual minimum input voltage to maintain a regulated output will depend on output voltage and load current. see applications information. note 4: current ? ows into the boost pin only during the on period of the switch cycle. downloaded from: http:///
lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 4 1765fd typical performance characteristics temperature (c) C50 fb voltage (v) 100 1765 g01 05 0 1.2201.215 1.210 1.205 1.200 1.195 1.190 1.185 1.180 C25 25 75 125 switch current (a) 1 350300 250 200 150 100 50 0 0 1765 g02 23 switch voltage (mv) t a = 125c t a = C40c t a = 25c temperature (c) C50 C25 0 25 50 75 100 125 frequency (mhz) 1765 g03 1.501.45 1.40 1.35 1.30 1.25 1.20 1.15 1.10 temperature (c) C50 C25 0 25 50 75 100 125 shdn threshold (v) 1765 g04 1.401.38 1.36 1.34 1.32 1.30 v in (v) 0 5 10 15 20 25 30 v in current (a) 1765 g05 76 5 4 3 2 1 0 shdn = 0v v in (v) 0 5 10 15 20 25 30 v in current (a) 1765 g05 76 5 4 3 2 1 0 shdn = 0v shdn threshold vs temperature shdn supply current vs v in shdn i p current vs temperature fb vs temperature (adj) switch on voltage drop oscillator frequency downloaded from: http:///
lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 5 1765fd typical performance characteristics load current (a) 0.001 0.01 0.1 1 input voltage (v) 1765 g07 3.53.3 3.1 2.9 2.7 2.5 shutdown voltage (v) 0 0.2 0.4 0.6 0.8 1 1.2 1.4 v in current (a) 1765 g08 300250 200 150 100 50 0 v in = 15v input voltage (v) 0 5 10 15 20 25 30 v in current (a) 1765 g09 12001000 800600 400 200 0 undervoltagelockout feedback voltage (v) 0 0.2 0.4 0.6 0.8 1 1.2 switch peak current (a) 1765 g10 43 2 1 0 fb input current (a) 4030 20 10 0 fb current switch current 1765 g11 input voltage (v) 0 5 10 15 20 25 output current (a) 3.02.8 2.6 2.4 2.2 2.0 l = 4.7h l = 2.2h l = 1.5h input voltage (v) 05 10 15 20 25 output current (a) 1765 g12 3.02.8 2.6 2.4 2.2 l = 4.7h l = 2.2h l = 1.5h current limit foldback maximum load current, v out = 5v maximum load current, v out = 2.5v minimum input voltage for 2.5v out shdn supply current input supply current downloaded from: http:///
lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 6 1765fd pin functions fb: the feedback pin is used to set output voltage using an external voltage divider (adjustable version) that gener- ates 1.2v at the pin when connected to the desired output voltage. the ? xed voltage 1.8v, 2.5v, 3.3v and 5v versions have the divider network included internally and the fb pin is connected directly to the output. if required, the current limit can be reduced during start up or short-circuit when the fb pin is below 0.5v (see the current limit foldback graph in the typical performance characteristics section). an impedance of less than 5k on the adjustable version at the fb pin is needed for this feature to operate. boost: the boost pin is used to provide a drive voltage, higher than the input voltage, to the internal bipolar npn power switch. v in : this is the collector of the on-chip power npn switch. this pin powers the internal circuitry and internal regulator. at npn switch on and off, high di/dt edges occur on this pin. keep the external bypass capacitor and catch diode close to this pin. all trace inductance on this path will create a voltage spike at switch off, adding to the v ce volt- age across the internal npn. both v in pins of the tssop package must be shorted together on the pc board. gnd: the gnd pin acts as the reference for the regulated output, so load regulation will suffer if the ground end of the load is not at the same voltage as the gnd pin of the ic. this condition will occur when load current or other currents ? ow through metal paths between the gnd pin and the load ground point. keep the ground path short between the gnd pin and the load and use a ground plane when possible. keep the path between the input bypass and the gnd pin short. the exposed gnd pad and/or gnd pins of the package are directly attached to the internal tab. these pins/pad should be attached to a large copper area to reduce thermal resistance. v sw : the switch pin is the emitter of the on-chip power npn switch. this pin is driven up to the input pin voltage during switch on time. inductor current drives the switch pin negative during switch off time. negative voltage must be clamped with an external catch diode with a v br <0.8v. both v sw pins of the tssop package must be shorted together on the pc board. sync: the sync pin is used to synchronize the internal oscillator to an external signal. it is directly logic compat-ible and can be driven with any signal between 20% and 80% duty cycle. the synchronizing range is from 1.6mhz to 2mhz. see synchronization section in applications information for details. when not in use, this pin should be grounded. shdn : the shutdown pin is used to turn off the regula- tor and to reduce input drain current to a few microam-peres. the 1.33v threshold can function as an accurate undervoltage lockout (uvlo), preventing the regulator from operating until the input voltage has reached a pre- determined level. float or pull high to put the regulator in the operating mode. v c : the v c pin is the output of the error ampli? er and the input of the peak switch current comparator. it is normally used for frequency compensation, but can do double duty as a current clamp or control loop override. this pin sits at about 0.4v for very light loads and 0.9v at maximum load. it can be driven to ground to shut off the output. downloaded from: http:///
lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 7 1765fd block diagram C + C + input 2.5v bias regulator 1.25mhz oscillator v sw fb v c gnd 1765 f01 slope comp 0.005 internalv cc currentsense amplifier voltage gain = 40 sync shdn shutdown comparator current comparator error amplifier g m = 850mho boost r s flip-flop driver circuitry sr 0.4v q1power switch parasitic diodes do not forward bias 1.2v C + C + 1.33v 3a 7a internalv cc the lt1765 is a constant frequency, current mode buck converter. this means that there is an internal clock and two feedback loops that control the duty cycle of the power switch. in addition to the normal error ampli? er, there is a current sense ampli? er that monitors switch current on a cycle-by-cycle basis. a switch cycle starts with an oscillator pulse which sets the r s ? ip-? op to turn the switch on. when switch current reaches a level set by the inverting input of the comparator, the ? ip-? op is reset and the switch turns off. output voltage control is obtained by using the output of the error ampli? er to set the switch current trip point. this technique means that the error ampli? er commands current to be delivered to the output rather than voltage. a voltage fed system will have low phase shift up to the resonant frequency of the inductor and output capacitor, then an abrupt 180 shift will occur. the current fed system will have 90 phase shift at a much lower frequency, but will not have the additional 90 shift until well beyond the lc resonant frequency. this makes it much easier to frequency compensate the feedback loop and also gives much quicker transient response. high switch ef? ciency is attained by using the boost pin to provide a voltage to the switch driver which is higher than the input voltage, allowing the switch to be saturated. this boosted voltage is generated with an external capacitor and diode. a comparator connected to the shutdown pin disables the internal regulator, reducing supply current. figure 1. block diagram downloaded from: http:///
lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 8 1765fd figure 2. feedback network C + 1.2v v sw v c gnd 1765 f02 r1r2 10k output error amplifier fb lt1765 (adj) + fb resistor network if an output voltage of 1.8v, 2.5v, 3.3v or 5v is required, the respective ? xed option part, -1.8, -2.5, -3.3 or -5, should be used. the fb pin is tied directly to the output; the necessary resistive divider is already included on the part. for other voltage outputs, the adjustable part should be used and an external resistor divider added. the suggested resistor (r2) from fb to ground is 10k. this reduces the contribution of fb input bias current to output voltage to less than 0.25%. the formula for the resistor (r1) from v out to fb is: r rv ra out 1 21 2 12 2025 = (? . ) .? (. ) applications information applications information rating and turn-on surge problems. y5v or similar type ceramics can be used since the absolute value of capaci- tance is less important and has no signi? cant effect on loop stability. if operation is required close to the minimum input required by the output or the lt1765, a larger value may be required. this is to prevent excessive ripple caus- ing dips below the minimum operating voltage resulting in erratic operation. if tantalum capacitors are used, values in the 22f to 470f range are generally needed to minimize esr and meet ripple current and surge ratings. care should be taken to ensure the ripple and surge ratings are not exceeded. the avx tps and kemet t495 series tantalum capacitors are surge rated. avx recommends derating capacitor operating voltage by 2:1 for high surge applications. output capacitor unlike the input capacitor, rms ripple current in the output capacitor is normally low enough that ripple current rating is not an issue. the current waveform is triangular, with an rms value given by: i vvv lfv ripple rms out in out in () = () () ()() ( 029 . )) the lt1765 will operate with both ceramic and tantalum output capacitors. ceramic capacitors are generally cho- sen for their small size, very low esr (effective series resistance), and good high frequency operation. ceramic output capacitors in the 1f to 10f range, x7r or x5r type are recommended. tantalum capacitors are usually chosen for their bulk capacitance properties, useful in high transient load ap- plications. esr rather than absolute value de? nes output ripple at 1.25mhz. typical lt1765 applications require a tantalum capacitor with less than 0.3 esr at 22f to 500f, see table 2. this esr provides a useful zero in the frequency response. ceramic output capacitors with low esr usually require a larger v c capacitor or an additional series r to compensate for this. input capacitor step-down regulators draw current from the input supply in pulses. the rise and fall times of these pulses are very fast. the input capacitor is required to reduce the voltage ripple at the input of lt1765 and to force the switching current into a tight local loop, thereby minimizing emi. the rms ripple current can be calculated from: ii v v v v ripple rms out out in out in () = () / 2 ceramic capacitors are ideal for input bypassing. at higher switching frequency, the energy storage requirement of the input capacitor is reduced so values in the range of 1f to 4.7f are suitable for most applications. their high frequency capacitive nature removes most ripple current downloaded from: http:///
lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 9 1765fd table 2. surface mount solid tantalum capacitor esr and ripple current e case size esr (max, ) ripple current (a) avx tps, sprague 593d 0.1 to 0.3 0.7 to 1.1 avx taj 0.7 to 0.9 0.4 d case size avx tps, sprague 593d 0.1 to 0.3 0.7 to 1.1 c case size avx tps 0.2 (typ) 0.5 (typ) figure 3 shows a comparison of output ripple for a ceramic and tantalum capacitor at 200ma ripple current. applications information i out max () = continuous mode i vvv lfv p out in out in ? () (? ) ()()( ) 2 for v in = 8v, v out = 5v and l = 3.3h, i out max () .? . ? = () () () () ( 3 585 2 3 3 10 1 25 10 8 66 )) = = 3 0 23 2 77 ..a note that the worst case (minimum output current avail-able) condition is at the maximum input voltage. for the same circuit at 15v, maximum output current would be only 2.6a. inductor selection the output inductor should have a saturation current rating greater than the peak inductor current set by the current comparator of the lt1765. the peak inductor current will depend on the output current, input and output voltages and the inductor value: ii vvv lfv peak out out in out in =+ () ()() () 2 v in = maximum input voltage f = switching frequency, 1.25mhz if an inductor with a peak current lower than the maximum switch current of the lt1765 is chosen a soft-start circuit in figure 10 should be used. also, short-circuit conditions should not be allowed because the inductor may saturate resulting in excessive power dissipation. also, consideration should be given to the resistance of the inductor. inductor conduction loses are directly proportional to the dc resistance of inductor. sometime, the manufacturers will also provide maximum current rating based on the allowable losses in the inductor. care should be taken, however. at high input voltages and low dcr, excessive switch current could ? ow during shorted output condition. suitable inductors are available from coilcraft, coiltronics, dale, sumida, toko, murata, panasonic and other manufacturers. figure 3. output ripple voltage waveform v sw (5v/div) v out using 2.2f ceramic capacitor (10mv/div) v out using 47f, 0.1 tantalum capacitor (10mv/div) 0.2s/div 1765 f03 inductor choice and maximum output current maximum output current for an lt1765 buck converter is equal to the maximum switch rating (i p ) minus one half peak to peak inductor ripple current. the lt1765 main- tains a constant switch current rating at all duty cycles. (patent pending) for most applications, the output inductor will be in the 1h to 10h range. lower values are chosen to reduce the physical size of the inductor, higher values allow higher output currents due to reduced peak to peak ripple current. the following formula gives maximum output current for continuous mode operation, implying that the peak to peak ripple (2x the term on the right) is less than the maximum switch current. downloaded from: http:///
lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 10 1765fd applications information applications information table 3 part number value (h) irms (amps) dcr () height (mm) coiltcraft do1608c-222 2.2 2.4 0.07 2.9 sumida cdrh3d16-1r5 1.5 1.6 0.043 1.8 cdrh4d18-1r0 1.0 1.7 0.035 2.0 cdc5d23-2r2 2.2 2.2 0.03 2.5 cr43-1r4 1.4 2.5 0.056 3.5 cdrh5d28-2r6 2.6 2.6 0.013 3.0 toko (d62f)847fy-2r4m 2.4 2.5 0.037 2.7 (d73lf)817fy-2r2m 2.2 2.7 0.03 3.0 catch diode the diode d1 conducts current only during switch off time. peak reverse voltage is equal to regulator input voltage. average forward current in normal operation can be calculated from: i ivv v d avg out in out in () = () the only reason to consider a larger than 3a diode is the worst-case condition of a high input voltage and shorted output. with a shorted condition, diode current will increase to a typical value of 4a, determined by peak switch current limit of the lt1765. a higher forward voltage will also limit switch current. this is safe for short periods of time, but it would be prudent to check with the diode manufacturer if continuous operation under these conditions must be tolerated. boost pin for most applications, the boost components are a 0.18f capacitor and a cmdsh-3 diode. the anode is typically connected to the regulated output voltage to generate a voltage approximately v out above v in to drive the output stage. the output driver requires at least 2.7v of headroom throughout the on period to keep the switch fully saturated. however, the output stage discharges the boost capacitor during this on time. if the output voltage is less than 3.3v, it is recommended that an alternate boost supply is used. the boost diode can be connected to the input, although, care must be taken to prevent the 2x v in boost voltage from exceeding the boost pin absolute maximum rating. the additional voltage across the switch driver also increases power loss, reducing ef? ciency. if available, an independent supply can be used with a local bypass capacitor. a 0.18f boost capacitor is recommended for most ap- plications. almost any type of ? lm or ceramic capacitor is suitable, but the esr should be <1 to ensure it can be fully recharged during the off time of the switch. the capacitor value is derived from worst-case conditions of 700ns on-time, 90ma boost current, and 0.7v discharge ripple. this value is then guard banded by 2x for secondary factors such as capacitor tolerance, esr and temperature effects. the boost capacitor value could be reduced under less demanding conditions, but this will not improve cir- cuit operation or ef? ciency. under low input voltage and low load conditions, a higher value capacitor will reduce discharge ripple and improve start up operation. shutdown and undervoltage lockout figure 4 shows how to add undervoltage lockout (uvlo) to the lt1765. typically, uvlo is used in situations where the input supply is current limited , or has a relatively high source resistance. a switching regulator draws constant power from the source, so source current increases as source voltage drops. this looks like a negative resistance load to the source and can cause the source to current limit or latch low under low source voltage conditions. uvlo prevents the regulator from operating at source voltages where these problems might occur. figure 4. undervoltage lockout 1.33v gnd v sw input r1 1765 f04 output shdn v cc in lt1765 3a r2 c1 + 7a downloaded from: http:///
lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 11 1765fd applications information an internal comparator will force the part into shutdown below the minimum v in of 2.6v. this feature can be used to prevent excessive discharge of battery-operated sys- tems. if an adjustable uvlo threshold is required, the shutdown pin can be used. the threshold voltage of the shutdown pin comparator is 1.33v. a 3a internal current source defaults the open pin condition to be operating (see typical performance graphs). current hysteresis is added above the shdn threshold. this can be used to set voltage hysteresis of the uvlo using the following: r vv a r v vv r a hl h 1 7 2 133 133 1 3 = = () + . . v h C turn-on threshold v l C turn-off threshold example: switching should not start until the input is above 4.75v and is to stop if the input falls below 3.75v. v h = 4.75v v l = 3.75v r vv a k r v vv k a k 1 475 375 7 143 2 133 475 133 143 3 49 4 = = = () + = .. . .. . keep the connections from the resistors to the shdn pin short and make sure that the interplane or surface capacitance to the switching nodes are minimized. if high resistor values are used, the shdn pin should be bypassed with a 1nf capacitor to prevent coupling problems from the switch node. synchronization the sync pin is used to synchronize the internal oscilla- tor to an external signal. the sync input must pass from a logic level low, through the maximum synchronization threshold with a duty cycle between 20% and 80%. the input can be driven directly from a logic level output. the synchronizing range is equal to initial operating frequency up to 2mhz. this means that minimum practical sync frequency is equal to the worst-case high self-oscillating frequency (1.6mhz), not the typical operating frequency of 1.25mhz. caution should be used when synchronizing above 1.8mhz because at higher sync frequencies the amplitude of the internal slope compensation used to prevent subharmonic switching is reduced. this type of subharmonic switching only occurs at input voltages less than twice output voltage. higher inductor values will tend to eliminate this problem. see frequency compensation section for a discussion of an entirely different cause of subharmonic switching before assuming that the cause is insuf? cient slope compensation. application note 19 has more details on the theory of slope compensation. layout considerations as with all high frequency switchers, when considering layout, care must be taken in order to achieve optimal electrical, thermal and noise performance. for maximum ef? ciency, switch rise and fall times are typically in the nanosecond range. to prevent noise both radiated and conducted, the high speed switching current path, shown in figure 5, must be kept as short as possible. shortening this path will also reduce the parasitic trace inductance of approximately 25nh/inch. at switch off, this parasitic inductance produces a ? yback spike across the lt1765 switch. when operating at higher currents and input volt-ages, with poor layout, this spike can generate voltages across the lt1765 that may exceed its absolute maximum figure 5. high speed switching path 1765 f05 5v l1 sw v in lt1765 d1 c1 c3 v in high frequency circulating path load downloaded from: http:///
lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 12 1765fd applications information applications information rating. a ground plane should always be used under the switcher circuitry to prevent interplane coupling and overall noise. the v c and fb components should be kept as far away as possible from the switch and boost nodes. the lt1765 pinout has been designed to aid in this. the ground for these components should be separated from the switch current path. failure to do so will result in poor stability or subharmonic like oscillation. board layout also has a signi? cant effect on thermal resistance. the exposed pad or gnd pin is a continuous copper plate that runs under the lt1765 die. this is the best thermal path for heat out of the package as can be seen by the low jc of the exposed pad package. reduc- ing the thermal resistance from pin 4 or exposed pad onto the board will reduce die temperature and increase the power capability of the lt1765. this is achieved by providing as much copper area as possible around this pin/pad. also, having multiple solder ? lled feedthroughs to a continuous copper plane under lt1765 will help in reducing thermal resistance. ground plane is usually suit- able for this purpose. in multilayer pcb designs, placing a ground plane next to the layer with the lt1765 will reduce thermal resistance to a minimum. thermal calculations power dissipation in the lt1765 chip comes from four sources: switch dc loss, switch ac loss, boost circuit cur- rent, and input quiescent current. the following formulas show how to calculate each of these losses. these formulas assume continuous mode operation, so they should not be used for calculating ef? ciency at light load currents. switch loss: p ri v v ns i v f sw sw out out in out in = () ( ) + () () ( ) 2 17 boost current loss for vboost = vout: p vi v boost out out in = () 2 50 / quiescent current loss: pv qi n = () 0 001 . r sw = switch resistance (0.13 at hot) 17ns = equivalent switch current/voltage overlap timef = switch frequency figure 6. typical application and layout (topside only shown) boost lt1765-33 v in output3.3v 2.5a input 15v 1765 f06 c2 0.18f c c 2.2nf d1b220a c14.7f ceramic c3 4.7f ceramic d2 cmdsh-3 l1 2.7h v sw fb shdn on off gnd v c sync gnd keep fb and v c components and traces away from high frequency, high input components place feedthroughs under and around ground pad for good thermal conductivity 1765 f6a gnd minimize d1, c3 lt1765 loop c3 d2 c2 l1 kelvin sense v out d1 c1 v in v out c c downloaded from: http:///
lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 13 1765fd applications information example: with v in = 10v, v out = 5v and i out = 2a: p w pwpw sw boost q = ( )()() + () ()( ) () =+ = = ()( ) = = () = 013 2 5 10 17 10 2 10 1 25 10 026 043 069 5250 10 01 10 0 001 0 01 2 96 2 . ?. ? .. . / . .. total power dissipation, p tot , is 0.69 + 0.1 + 0.01 = 0.8w. thermal resistance for the lt1765 16-lead tssop exposed pad package is in? uenced by the presence of internal or backside planes. with a full plane under the package, thermal resistance will be about 45c/w. with no plane under the package, thermal resistance will increase to about 110c/w. for the exposed pad package jc(pad) = 10c/w. thermal resistance is dominated by board perfor- mance. to calculate die temperature, use the appropriate thermal resistance number and add in worst-case ambient temperature: t j = t a + ja (ptot) when estimating ambient, remember the nearby catch diode will also be dissipating power. p vv v i v diode f in out load in = () () ( ) v f = forward voltage of diode (assume 0.5v at 2a) pw diode = () () ( ) = 05 10 5 2 10 05 . . notice that the catch diodes forward voltage contributes a signi? cant loss in the overall system ef? ciency. a larger, lower v f diode can improve ef? ciency by several percent. typical thermal resistance of the board b is 35c/w. at an ambient temperature of 25c, t j = t a + ja (p tot ) + b (p diode ) t j = 25 + 45 (0.8) + 35 (0.5) = 79c die temperature measurement if a true die temperature is required, a measurement of the sync to gnd pin resistance can be used. the sync pin resistance across temperature must ? rst be calibrated, with no signi? cant output load, in an oven. an initial value of 40k with a temperature coef? cient of 0.16%/c is typical. the same measurement can then be used in operation to indicate the die temperature. frequency compensation before starting on the theoretical analysis of frequency response, the following should be rememberedthe worse the board layout, the more dif? cult the circuit will be to stabilize. this is true of almost all high frequency analog circuits, read the layout considerations section ? rst. common layout errors that appear as stability problems are distant placement of input decoupling capacitor and/or catch diode, and connecting the v c compensation to a ground track carrying signi? cant switch current. in addition, the theoretical analysis considers only ? rst order ideal component behavior. for these reasons, it is important that a ? nal stability check is made with production layout and components. the lt1765 uses current mode control. this alleviates many of the phase shift problems associated with the inductor. the basic regulator loop is shown in figure 7, with both tantalum and ceramic capacitor equivalent circuits. the lt1765 can be considered as two g m blocks, the error ampli? er and the power stage. figure 7. model for loop response C + 1.2v v sw v c lt1765 gnd 1765 f07 r1 output esr c f c c r c 500k error amplifier fb r2 c1 current mode power stage g m = 5mho g m = 850 mho + esl ceramic tantalum c1 downloaded from: http:///
lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 14 1765fd applications information applications information figure 8 shows the overall loop response with a 330pf vc capacitor and a typical 100f tantalum output capacitor. the response is set by the following terms: error ampli er: dc gain set by g m and r l = 850 ? 500k = 425. pole set by c f and r l = (2 ? 500k ? 330p) C1 = 965hz. unity-gain set by c f and g m = (2 ? 330p ? 850 C1 ) C1 = 410khz. power stage: dc gain set by g m and r l (assume 5) = 5 ? 5 = 25. pole set by c out and r l = (2 ? 100 ? 10) C1 = 159hz. unity-gain set by c out and g m = (2 ? 100 ? 5 C1 ) C1 = 8khz. tantalum output capacitor: zero set by c out and c esr = (2 ? 100 ? 0.1) C1 = 15.9khz. the zero produced by the esr of the tantalum output capaci- tor is very useful in maintaining stability. ceramic output capacitors do not have a zero due to very low esr, but are dominated by their esl. they form a notch in the 1mhz to 10mhz range. without this zero, the v c pole must be made dominant. a typical value of 2.2nf will achieve this. if better transient response is required, a zero can be added to the loop using a resistor (r c ) in series with the compensation capacitor. as the value of r c is increased, transient response will generally improve, but two effects limit its value. first, the combination of output capacitor esr and a large r c may stop loop gain rolling off altogether. second, if the loop gain is not rolled suf? ciently at the switching frequency, output ripple will perturb the v c pin enough to cause unstable duty cycle switching similar to subharmonic oscillation. this may not be apparent at the output. small signal analysis will not show this since a continuous time system is assumed. if needed, an additional capacitor (c f ) can be added to the v c pin to form a pole at typically one ? fth the switching frequency (if r c = ~ 5k, c f = ~ 100pf) when checking loop stability, the circuit should be operated over the applications full voltage, current and temperature range. any transient loads should be applied and the output voltage monitored for a well-damped behavior. converter with backup output regulator in systems with a primary and backup supply, for example, a battery powered device with a wall adapter input, the output of the lt1765 can be held up by the backup supply with its input disconnected. in this condition, the sw pin will source current into the v in pin. if the shdn pin is held at ground, only the shutdown current of 6a will be pulled via the sw pin from the second supply. with the shdn pin ? oating, the lt1765 will consume its quiescent operating current of 1ma. the v in pin will also source current to any other components connected to the input line. if this load is greater than 10ma or the input could be shorted to ground, a series schottky diode must be added, as shown in figure 9. with these safeguards, the output can be held at voltages up to the v in absolute maximum rating. buck converter with adjustable soft-start large capacitive loads or high input voltages can cause high input currents at start-up. figure 10 shows a circuit that limits the dv/dt of the output at start-up, controlling the capacitor charge rate. the buck converter is a typical con? guration with the addition of r3, r4, c ss and q1. as the output starts to rise, q1 turns on, regulating switch current via the v c pin to maintain a constant dv/dt at the output. output rise time is controlled by the current through c ss de? ned by r4 and q1s v be . once the output is in regulation, q1 turns off and the circuit operates normally. r3 is transient protection for the base of q1. figure 8. overall loop response frequency (hz) gain (db) 8060 40 20 0 C20C40 phase (deg) 180150 120 90 60 30 0 1765 f08 gain phase v out = 5v c out = 100f, 0.1 c c = 330pf r c /c f = 0 i load = 1a 10 1k 10k 1m 100 100k downloaded from: http:///
lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 15 1765fd applications information figure 10. buck converter with adjustable soft start boost lt1765-5 v in output5v 2.5a input 12v 1765 f10 c2 0.18f c1 100f c ss 15nf c c 330pf d1 c3 2.2f d2 cmdsh-3 l1 5h r3 2k v sw fb shdn gnd v c sync + r447k q1 d1: b220aq1: 2n3904 risetime rc v v ss out be = ()( )( ) () 4 using the values shown in figure 10, risetime ms == (? )(? )() . ? 47 10 15 10 5 07 5 39 the ramp is linear and rise times in the order of 100ms are possible. since the circuit is voltage controlled, the ramp rate is unaffected by load characteristics and maximum output current is unchanged. variants of this circuit can be used for sequencing multiple regulator outputs. dual output converter the circuit in figure 11 generates both positive and negative 5v outputs with a single piece of magnetics. the two induc- tors shown are actually just two windings on a standard b h electronics inductor. the topology for the 5v output is a standard buck converter. the C5v topology would be a simple ? yback winding coupled to the buck converter if c4 were not present. c4 creates a sepic (single-ended primary inductance converter) topology which improves regulation and reduces ripple current in l1. without c4, the voltage swing on l1b compared to l1a would vary due to relative loading and coupling losses. c4 provides a low impedance path to maintain an equal voltage swing in l1b, improving regulation. in a ? yback converter, during switch on time, all the converters energy is stored in l1a only, since no current ? ows in l1b. at switch off, energy is transferred by magnetic coupling into l1b, powering the C5v rail. c4 pulls l1b positive during switch on time, causing current to ? ow, and energy to build in l1b and c4. at switch off, the energy stored in both l1b and c4 supply the C5v rail. this reduces the current in l1a and changes l1b current waveform from square to triangular. for details on this circuit, including maximum output cur- rents, see design note 100 figure 9. dual source supply with 6a reverse leakage 3.3v, 2a * only required if additional loads on the input can sink >10ma removable input 0.18f 2.2nf 83k b220a 1765 f09 2.2f mbrs330t3* cmdsh-3 5h 4.7f boost lt1765-3.3 v in v sw fb shdn gnd v c sync alternate supply 28.5k downloaded from: http:///
lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 16 1765fd applications information figure 11a. dual output converter output5v at 1.5a output C5v ? at 1.1a * l1 is a single core with two windings coiltronics ctx5-1a ? if load can go to zero, an optional preload of 1k to 5k may be used to improve load regulation d1, d3: b220a input 12v gnd 1765 f11a c2 0.18f c c 4700pf r c 3.3k d1 4.7f6.3v ceramic 4.7mf 6.3v ceramic c32.2f 25v ceramic c4 4.7f 16v ceramic d2 cmdsh-3 d3 l1a* l1b* boost lt1765-5 v in v sw fb shdn gnd v c sync figure 11b. dual output converter (output currents) 5v load current (ma) 10 100 1000 10000 max C5v load (ma) 1765 f11b 12001000 800600 400 200 0 downloaded from: http:///
lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 17 1765fd applications information figure 12. positive-to-negative low output ripple converter c c 1800pf r c 2.4k c f 100pf output C5v at 1a l1: cdrh6d28-3r0 input 5v 1765 f12 c2 0.22f d1b220a c110f 6.3v x5r ceramic c32.2f 16v x5r ceramic d2 cmdsh-3 l1 3h d3b220a boost u1 lt1765-5 v in 22f v sw fb sync shdn gnd v c figure 13. negative boost converter s s s s s s s s s s s s s s inputC5v l1: cdrh5d28-2r5bold lines indicate high current paths output C9v at 1a 1765 f13 c2 0.22f c c 4700pf r c 6.8k d1ups120 c12.2f 6.3v x5r c322f 16v x5r ceramic d2 cmdsh-3 l1 2.5h boost u1 lt1765fe v in v sw fb sync shdn gnd v c r2 10k c f 100pf r1 64.9k downloaded from: http:///
lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 18 1765fd package description fe package 16-lead plastic tssop (4.4mm) (reference ltc dwg # 05-08-1663) exposed pad variation bb fe16 (bb) tssop 0204 0.09 C 0.20 (.0035 C .0079) 0 C 8 0.25 ref 0.50 C 0.75 (.020 C .030) 4.30 C 4.50* (.169 C .177) 134 5 6 7 8 10 9 4.90 C 5.10* (.193 C .201) 16 1514 13 12 11 1.10 (.0433) max 0.05 C 0.15 (.002 C .006) 0.65 (.0256) bsc 2.94 (.116) 0.195 C 0.30 (.0077 C .0118) typ 2 recommended solder pad layout 0.45 ? 0.05 0.65 bsc 4.50 ? 0.10 6.60 ? 0.10 1.05 ? 0.10 2.94 (.116) 3.58 (.141) 3.58 (.141) millimeters (inches) *dimensions do not include mold flash. mold flash shall not exceed 0.150mm (.006") per side note:1. controlling dimension: millimeters 2. dimensions are in 3. drawing not to scale see note 4 4. recommended minimum pcb metal size for exposed pad attachment 6.40 (.252) bsc downloaded from: http:///
lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 19 1765fd information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description s8 package 8-lead plastic small outline (narrow .150 inch) (reference ltc dwg # 05-08-1610) .016 C .050 (0.406 C 1.270) .010 C .020 (0.254 C 0.508) 45 0C 8 typ .008 C .010 (0.203 C 0.254) so8 0303 .053 C .069 (1.346 C 1.752) .014 C .019 (0.355 C 0.483) typ .004 C .010 (0.101 C 0.254) .050 (1.270) bsc 1 2 3 4 .150 C .157 (3.810 C 3.988) note 3 8 7 6 5 .189 C .197 (4.801 C 5.004) note 3 .228 C .244 (5.791 C 6.197) .245 min .160 ? .005 recommended solder pad layout .045 ? .005 .050 bsc .030 ? .005 typ inches (millimeters) note:1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm) downloaded from: http:///
lt1765/lt1765-1.8/lt1765-2.5/ lt1765-3.3/lt1765-5 20 1765fd linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2001 lt 0608 rev d printed in usa related parts part number description comments lt1074/lt1074hv 4.4a (i out ), 100khz, high ef? ciency step-down dc/dc converter v in : 7.3v to 45v/64v, v out(min) = 2.21v, i q = 8.5ma, i sd = 10a, dd5/7, to220-5/7 lt1076/lt1076hv 1.6a (i out ), 100khz, high ef? ciency step-down dc/dc converter v in : 7.3v to 45v/64v, v out(min) = 2.21v, i q = 8.5ma, i sd = 10a, dd5/7, to220-5/7 lt1676 60v, 440ma (i out ), 100khz, high ef? ciency step-down dc/dc converter v in : 7.4v to 60v, v out(min) = 1.24v, i q = 3.2ma, i sd < 2.5a, so-8 lt1765 25v, 2.75a (i out ), 1.25mhz, high ef? ciency step-down dc/dc converter v in : 3v to 25v, v out(min) = 1.20v, i q = 1ma, i sd < 15a, so-8, tssop16e lt1766 60v, 1.2a (iout), 200khz, high ef? ciency step-down dc/dc converter v in : 5.5v to 60v, v out(min) = 1.20v, i q = 2.5ma, i sd < 25a, tssop16/e lt1767 25v, 1.2a (i out ), 1.25mhz, high ef? ciency step-down dc/dc converter v in : 3v to 25v, v out(min) = 1.20v, i q = 1ma, i sd < 6a, ms8/e lt1776 40v, 550ma (i out ), 200khz, high ef? ciency step-down dc/dc converter v in : 7.4v to 40v, v out(min) = 1.24v, i q = 3.2ma, i sd < 30a, n8, so-8 lt1940 25v, dual 1.2a (i out ), 1.1mhz, high ef? ciency step-down dc/dc converter v in : 3v to 25v, v out(min) = 1.2v, i q = 3.8ma, i sd = < 1a, tssop16e lt1956 60v, 1.2a (i out ), 500khz, high ef? ciency step-down dc/dc converter v in : 5.5v to 60v, v out(min) = 1.20v, i q = 2.5ma, i sd < 25a, tssop16/e lt1976 60v, 1.2a (i out ), 200khz, high ef? ciency step-down dc/dc converter with burst mode ? operation v in : 3.3v to 60v, v out(min) = 1.20v, i q = 100a, i sd < 1a, tssop16e lt3010 80v, 50ma, low noise linear regulator v in : 1.5v to 80v, v out(min) = 1.28v, i q = 30a, i sd < 1a, ms8e ltc3407 dual 600ma (i out ), 1.5mhz, synchronous step-down dc/dc converter v in : 2.5v to 5.5v, v out(min) = 0.6v, i q = 40a, i sd < 1a, ms10e ltc3412 2.5a (i out ), 4mhz, synchronous step-down dc/dc converter v in : 2.5v to 5.5v, v out(min) = 0.8v, i q = 60a, i sd < 1a, tssop16e ltc3414 4a (i out ), 4mhz, synchronous step-down dc/dc converter v in : 2.3v to 5.5v, v out(min) = 0.8v, i q = 64a, i sd < 1a, tssop20e lt3430/lt3431 60v, 2.75a (i out ), 200khz/500khz, high ef? ciency step-down dc/dc converter v in : 5.5v to 60v, v out(min) = 1.20v, i q = 2.5ma, i sd = 30a, tssop16e lt3433 60v, 400ma (i out ), 200khz, high ef? ciency step-up/step-down dc/dc converter with burst mode operation v in : 4v to 60v, v out(min) = 3.3v to 20v, i q = 100a, i sd < 1a, tssop16e ltc3727/ltc3727-1 36v, 500khz, high ef? ciency step-down dc/dc converter v in : 4v to 36v, v out(min) = 0.8v, i q = 670a, i sd < 20a, qfn32, ssop28 burst mode is a registered trademark of linear technology corporation. downloaded from: http:///

▲Up To Search▲

Price & Availability of LT1765ES8

	To Download LT1765ES8 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .